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 MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low Voltage 1:9 Differential ECL/PECL Clock Driver
The MC100LVE111 is a low skew 1-to-9 differential driver, designed with clock distribution in mind. The MC100LVE111's function and performance are similar to the popular MC100E111, with the added feature of low voltage operation. It accepts one signal input, which can be either differential or single-ended if the VBB output is used. The signal is fanned out to 9 identical differential outputs.
MC100LVE111
LOW-VOLTAGE 1:9 DIFFERENTIAL ECL/PECL CLOCK DRIVER
* * * * * * *
200ps Part-to-Part Skew 50ps Output-to-Output Skew Differential Design VBB Output Voltage and Temperature Compensated Outputs Low Voltage VEE Range of -3.0 to -3.8V 75k Input Pulldown Resistors
The LVE111 is specifically designed, modeled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within a device, and empirical modeling is used to determineprocess control limits that ensure consistent tpd distributions from lot to lot. The net result is a dependable, guaranteed low skew device. To ensure that the tight skew specification is met it is necessary that both sides of the differential output are terminated into 50, even if only one side is being used. In most applications, all nine differential pairs will be used and therefore terminated. In the case where fewer than nine pairs are used, it is necessary to terminate at least the output pairs on the same package side as the pair(s) being used on that side, in order to maintain minimum skew. Failure to do this will result in small degradations of propagation delay (on the order of 10-20ps) of the output(s) being used which, while not being catastrophic to most designs, will mean a loss of skew margin.
FN SUFFIX PLASTIC PACKAGE CASE 776-02
The MC100LVE111, as with most other ECL devices, can be operated from a positive VCC supply in PECL mode. This allows the LVE111 to be used for high performance clock distribution in +3.3V systems. Designers can take advantage of the LVE111's performance to distribute low skew clocks across the backplane or the board. In a PECL environment, series or Thevenin line terminations are typically used as they require no additional power supplies. For systems incorporating GTL, parallel termination offers the lowest power by taking advantage of the 1.2V supply as a terminating voltage. For more information on using PECL, designers should refer to Motorola Application Note AN1406/D.
12/94
(c) Motorola, Inc. 1996
4-1
REV 1
MC100LVE111
Q0 25 VEE 26 27 28 1 2 3 4 5 Q8
Q0 24
Q1 VCCO Q1 23 22 21
Q2 20
Q2 19 18 17 16 Q3 Q3 Q4 VCCO Q4 Q5 Q5
PIN NAMES
Pins IN, IN Q0, Q0-Q8, Q8 VBB Function
NC IN Differential Input Pair Differential Outputs VBB Output VCC IN VBB NC
Pinout: 28-Lead PLCC (Top View)
15 14 13 12
6 Q8
7 Q7
8
9
10 Q6
11 Q6
VCCO Q7
LOGIC SYMBOL
Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 IN IN Q4 Q4 Q5 Q5 Q6 Q6 Q7 Q7 Q8 VBB Q8
MOTOROLA
4-2
ECLinPS and ECLinPS Lite DL140 -- Rev 3
MC100LVE111
ECL DC CHARACTERISTICS
-40C Symbol VOH VOL VIH VIL VBB VEE IIH IEE Characteristic Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Output Reference Voltage Power Supply Voltage Input HIGH Current Power Supply Current 55 Min -1.025 -1.810 -1.165 -1.810 -1.38 -3.0 Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 150 66 55 Min -1.025 -1.810 -1.165 -1.810 -1.38 -3.0 0C Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 150 66 55 Min -1.025 -1.810 -1.165 -1.810 -1.38 -3.0 25C Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 150 66 65 Min -1.025 -1.810 -1.165 -1.810 -1.38 -3.0 85C Typ -0.955 -1.705 Max -0.880 -1.620 -0.880 -1.475 -1.26 -3.8 150 78 Unit V V V V V V A mA
PECL DC CHARACTERISTICS
-40C Symbol VOH VOL VIH VIL VBB VCC IIH IEE Characteristic Output HIGH Voltage1 Output LOW Voltage1 Input HIGH Voltage1 Input LOW Voltage1 Output Reference Voltage1 Power Supply Voltage Input HIGH Current Power Supply Current 55 Min 2.275 1.490 2.135 1.490 1.92 3.0 Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 66 55 Min 2.275 1.490 2.135 1.490 1.92 3.0 0C Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 66 55 Min 2.275 1.490 2.135 1.490 1.92 3.0 25C Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 66 65 Min 2.275 1.490 2.135 1.490 1.92 3.0 85C Typ 2.345 1.595 Max 2.420 1.680 2.420 1.825 2.04 3.8 150 78 Unit V V V V V V A mA
1. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC.
AC CHARACTERISTICS (VEE = VEE (min) to VEE (max); VCC = VCCO = GND)
-40C Symbol tPLH tPHL tskew VPP VCMR tr/tf Characteristic Propagation Delay to Output IN (differential) IN (single-ended) Within-Device Skew Part-to-Part Skew (Diff) Minimum Input Swing Common Mode Range Output Rise/Fall Time 500 -1.5 200 -0.4 600 Min 400 350 Typ Max 650 700 50 250 500 -1.5 200 -0.4 600 Min 435 385 0C Typ Max 625 675 50 200 500 -1.5 200 -0.4 600 Min 440 390 25C Typ Max 630 680 50 200 500 -1.5 200 -0.4 600 Min 445 395 85C Typ Max 635 685 50 200 ps mV V ps Unit ps Note 1 Note 2 Note 3 Note 4 Note 5 20%-80% Condition
1. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals. See Definitions and Testing of ECLinPS AC Parameters in Chapter 1 (page 1-12) of the Motorola High Performance ECL Data Book (DL140/D). 2. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal. See Definitions and Testing of ECLinPS AC Parameters in Chapter 1 (page 1-12) of the Motorola High Performance ECL Data Book (DL140/D). 3. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device. 4. VPP(min) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP(min) is AC limited for the E111 as a differential input as low as 50 mV will still produce full ECL levels at the output. 5. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level must be such that the peak to peak voltage is less than 1.0 V and greater than or equal to VPP(min).
ECLinPS and ECLinPS Lite DL140 -- Rev 3
4-3
MOTOROLA
MC100LVE111
OUTLINE DIMENSIONS
FN SUFFIX PLASTIC PACKAGE CASE 776-02 ISSUE D 0.18 (0.007) U
M
-N-
Y BRK D
B
TN
M
S
-P
S
L
S
S
-M L
S
0.18 (0.007)
TN
-P
S
S
-M
S
-L-
28 LEADS ACTUAL
-MW D V X VIEW D-D A 0.18 (0.007)
M
Z1
28
1
-P-
G1 0.25 (0.010)
M
TN
S
-P
S
L
S
-M
S
TL
S
-M
S
N
S
-P
S
Z R 0.18 (0.007)
M
TL
S
-M
S
N
S
-P
S
C
E 0.10 (0.004) G G1 0.25 (0.010)
S
H -TSEATING PLANE
0.18 (0.007) 0.18 (0.007)
M M
TL TN
S S
-M -P
S S
N L
S S
-P -M
S S
J
K1 K
DETAIL S TL
S
-M
S
N
S
-P
S
F DETAIL S
0.18 (0.007) 0.18 (0.007)
M M
TL TN
S S
-M -P
S S
N L
S S
-P -M
S S
DIM A B C E F G H J K R U V W X Y Z G1 K1 Z1
MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 -- 0.64 -- 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 -- 0.50 2 10 10.42 10.92 1.02 -- 2 10
INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 -- 0.025 -- 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 -- 0.020 2 10 0.410 0.430 0.040 -- 2 10
NOTES: 1. DUE TO SPACE LIMITATION, CASE 776-02 SHALL BE REPRESENTED BY A GENERAL (SMALLER) CASE OUTLINE DRAWING RATHER THAN SHOWING ALL 28 LEADS. 2. DATUMS -L-, -M-, -N-, AND -P- DETERMINED WHERE TOP OF LEAD SHOULDER EXIT PLASTIC BODY AT MOLD PARTING LINE. 3. DIM G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 4. DIM R AND U DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE MOLD PROTRUSION IS 0.25 (0.010) PER SIDE. 5. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 6. CONTROLLING DIMENSION: INCH. 7. 776-01 IS OBSOLETE, NEW STANDARD 776-02.
MOTOROLA
4-4
ECLinPS and ECLinPS Lite DL140 -- Rev 3
MC100LVE111
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
ECLinPS and ECLinPS Lite DL140 -- Rev 3 4-5
*MC100LVE111/D*
MC100LVE111/D MOTOROLA


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